c0t0d0s0.org

As usual Paul brings an interesting perspective into discussion:

On the other hand.. the way the processors are coupled - done by replacing the the T2’s on board 10Gbyte facility - demonstrated that Sun can now produce highly customized versions of the core CPU set and suggests what I believe may be a unique performance opportunity for this product line.

Taking into consideration the additional transistor budget by the usage of upcoming process technologies, it should be feasible to integrate other interconnect technologies as well, for example Infiniband on die (just think about the latency advantages of an Infiniband port directly conneted to the crossbar) or the integration of additional support circuits for special tasks. I assume, there is only one limit ... the pin count of the proc ... at a certain point you can´t get all the interfaces out of the chip in an economical feasible manner.

Paul Venezia of Infoworld wrote a really positive review of the UltraSPARC T2 based Sun SPARC Enterprise T5120 - "Lab test: Sun’s octo-core SPARC is made to multitask". He even concludes at the end, that reports of SPARCs death are greatly exaggerated in the light of this system:

Overall, the UltraSPARC T2 and the T5120 build upon the hallmarks of the first-generation UltraSPARC T1-based servers, and remind us that although the SPARC CPU may have been marginalized in recent years, it hasn’t surrendered, and may in fact be making a comeback.

You have to take the benchmarks with a grain of salt, as it´s a synthetic benchmark but the results found by Robert Milkowski are interesting: 16-core Intel System vs. Niagara-2. Some results are expected. For tasks without threads, the T2 is slower, but as soon as the thread count rises above 64, the T2 gets faster than the Xeon box.

But there is more: The CPU benchmark for 16, 32 and 64 threads on XEON have almost the same outcome (at least on the diagram). As the Xeon configuration has 16 cores this can be explained. The 128 threads benchmark is slower than the 64 one on Xeon. It looks like the massive thread switching takes it´s toll here. Albeit the T2 has 16 piplines as well, the system doesn´t saturate at 16 threads, the total time in sysbench decreases at least until 64 threads (i´m not sure about 128 threads).

The memory benchmark show a huge advantage for the T2. The Xeon system saturates at 4 GB/s, the T2 delivers up to 17 GB/s. It´s interesting, that that the Xeon benchmark drops sharply at two parallel threads to regain the 4 GB/s at 16 Threads.

The last benchmark was an thread benchmark: Starting with 32 threads, the N2 is faster than the quad xeon. It would be interesting to see the benchmark with 18 or 20 threads (thus larger than the amout of existent cores).

Robert Milkowski summarizes it quite well:

Quick conclusion is that Niagara-2 box can rival 4-CPU 4-core (16 cores in total) Intel boxes if your application can utilize all these cores. Sometimes it's much faster - especially if you need to access lots of memory.

PS: The dual- and quadsocket VF are not so far away

Octave Orgeron did a really good review of the T5120 server. Octave closes his findings with:

The T5120 and the T5220 offer many unique and exciting features that set it apart from the competition. The UltraSPARC-T2 processor with 8 cores, 64 threads, 10Gb Ethernet, PCI-E, and cryptographic features are revolutionary in the computing industry. It is amazing to think that not long ago, it would have taken a much larger and more expensive solution to equal the features and benefits of these servers.

The T5210 and the T5220 wonthe SearchDataCenter Gold award in the category "small servers (four processors and under)":

Sun Microsystems Inc. impressed judges the most in the category of servers with four processor or less with their latest SPARC Enterprise T5120 and T5220 servers.

Phil ran a memory benchmark and summarized his results in Niagara 2 memory throughput according to libMicro:

[...] seeing 240ns latency, which equates to a throughput of 267 million memory reads per second (i.e. 64 / 0.240e-6). Just to set this in context, here are some data for a quad socket Tigerton system running at 2.93GHz...
[...] his shows a peak throughput of about 86 million memory reads per second (i.e. 16 / 0.186e-6), making the single chip UltraSPARC T2 processor's throughput 3x that of its quad chip rival.

It´s a micro benchmark, but it´s a part of the puzzle why an UltraSPARC T2 is able to outperform a processor with almost 2.5 times more clock cycles per seond.

Ubuntu was certified by Canonical on some new hardware from Sun. Now you can buy support for Ubuntu from Canonical for the Sun Fire T5220 and 5240 ( both UltraSPARC T2) and the Sun Ultra 24 (Xeon).

Rick Hetherington was in Munich today ... he gave a good presentation into the future of CMT SPARC and what we will see in the near and the middle term. Many people have the opinion, that Sparc will see it´s end soon, especially after the announcement of TI to stop investments in new process technologies. The direct opposite is true, more than ever. I was quite impressed. Unfortunately it´s not up to me to disclose things.

IBM announced the PVU for the UltraSPARC T2 a few days ago: Processor Value Unit Licensing for Distributed SW. An UltraSPARC T2 counts as 50 PVUs. That´s really good news. Why? Well, wait for the benchmarks and do the math yourself

BTW: The nice thing at PVUs: they have a political component. Thus PVUs are not really based of the real perfomance, they are based on the performance, IBM wants to admit. So, even when they don´t admit that T2 is better than Power6, they help us by making their software cheaper, and they can´t make them more expensive, as this would hurt their hardware bussiness by admiting, that T2 is better then Power6. Sometimes Catch-22´s are really funny ...

We fastly ramping up UltraSPARC T2. Here you see: 12 E10000k, only a little bit short of a quarter Terabit per second networkbandwith, 0,75 Terabyte per second memory bandwith, 96 cores, 192 integer pipelines, 96 crypro accelerators, 96 floating point units, 768 threads, 768 virtual processor. Imagine this processors in some nifty boxes, with a nice silver finish, 1 or 2 rack units high. Consuming only 1200 Watts for the processors. Imagine the load this babies can handle. 5 years ago, you had to fill a complete datacenter for a similar performance. Now it´s a small tray of CPUs (respective 12 or 24 rack units). Simply mind-boggling. But it´s even getting better: In the near future you will have this sheer power in only three machines.

Ich muss ja ganz offen gestehen, das ich die c´t nicht mehr lese. Die Zeitschrift hat vor vielen Jahren irgendwie den letzten Reiz verloren und in Zeiten der weltumspannenden, drahtgestützten Pornoverteilung gibt es als Nebenprodukt viele weitere Webseiten, die viel schneller Informationen liefern. Einer der wenigen Lichtblicke der c´t waren zuweilen die Kolumne "Prozessorgeflüster" von Andreas Stiller, auch wenn dieser sich selten positiv ueber das Haus Sun geäussert hat. Das scheint mit Von Wasserfällen und Ökowellen endlich ein Ende zu haben. Ich zitiere mal meinen Lieblingssatz:

All das ist jetzt Geschichte, denn nun hat Sun mit dem UltraSPARC T2 (Codename Niagara2) wieder ein ganz heißes selbstgestricktes Eisen im solaren Feuer, das zumindest als Einzelchip in der Multithreaded-Welt alle anderen in die Finsternis schickt - wobei man Intels „geschummelten“ Quad-Core mit zwei Dice in einem Gehäuse ruhig mit hinzurechnen darf.